EGGH03: SIGGRAPH/Eurographics Workshop on Graphics Hardware 2003

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https://diglib.eg.org/handle/10.2312/332

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Browsing EGGH03: SIGGRAPH/Eurographics Workshop on Graphics Hardware 2003 by Subject "Hardware Architecture"

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    A Multigrid Solver for Boundary Value Problems Using Programmable Graphics Hardware
    (The Eurographics Association, 2003) Goodnight, Nolan; Woolley, Cliff; Lewin, Gregory; Luebke, David; Humphreys, Greg; M. Doggett and W. Heidrich and W. Mark and A. Schilling
    We present a case study in the application of graphics hardware to general-purpose numeric computing. Specifi- cally, we describe a system, built on programmable graphics hardware, able to solve a variety of partial differential equations with complex boundary conditions. Many areas of graphics, simulation, and computational science require efficient techniques for solving such equations. Our system implements the multigrid method, a fast and popular approach to solving large boundary value problems. We demonstrate the viability of this technique by using it to accelerate three applications: simulation of heat transfer, modeling of fluid mechanics, and tone mapping of high dynamic range images. We analyze the performance of our solver and discuss several issues, including techniques for improving the computational efficiency of iterative grid-based computations for the GPU.
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    VoxelCache: A Cache-Based Memory Architecture for Volume Graphics
    (The Eurographics Association, 2003) Kanus, U.; Wetekam, G.; Hirche, J.; M. Doggett and W. Heidrich and W. Mark and A. Schilling
    This paper presents a cache-based memory architecture for volume graphics. We describe the memory organization and cache logic to implement a voxel cache based on 43 voxel blocks. We show an efficient prefetching scheme that increases the cache hit ratio to more than 98% in most cases. The performance of the memory system with different types of external memory is demonstrated by a cycle accurate C++ simulation. The VoxelCache memory architecture is designed to be easily adapted to different memory technologies, because all volume graphics specific parts of the memory system are encapsulated inside the on-chip cache. The design is targeted at implementation on off-the-shelf reconfigurable hardware.