On the Design of a Real-Time Volume Rendering Engine

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dc.contributor.authorSmit, J.en_US
dc.contributor.authorWessels, N.J.en_US
dc.contributor.authorHorst, A. van del'en_US
dc.contributor.authorBentum, M.J.en_US
dc.contributor.editorP F Listeren_US
dc.date.accessioned2014-02-06T14:19:41Z
dc.date.available2014-02-06T14:19:41Z
dc.date.issued1992en_US
dc.description.abstractAn architecture for a Real-Time Volume Rendering Engine is given capable of computing750x750x512 samples from a 3D dataset at a rate of 25 images per second.The RT-VRE uses for this purpose 64 dedicated rendering chips, cooperating with 16RISe-processors. An plane interpolator circuit and a composition circuit, both capableto operate at very high speeds, have been designed for a 1.6 micron VLSI process.The interpolator is now back from production. It has been tested an complied withour specifications."en_US
dc.description.seriesinformationEurographics Workshop on Graphics Hardwareen_US
dc.identifier.isbn-en_US
dc.identifier.issn-en_US
dc.identifier.urihttps://doi.org/10.2312/EGGH/EGGH92/070-076en_US
dc.publisherThe Eurographics Associationen_US
dc.titleOn the Design of a Real-Time Volume Rendering Engineen_US
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EGGH92: Eurographics Workshop on Graphics Hardware 1992