Towards Hardware Implementation Of Loop Subdivision

dc.contributor.authorBischoff, Stephanen_US
dc.contributor.authorKobbelt, Leif P.en_US
dc.contributor.authorSeidel, Hans-Peteren_US
dc.contributor.editorI. Buck and G. Humphreys and P. Hanrahanen_US
dc.date.accessioned2013-10-28T09:57:03Z
dc.date.available2013-10-28T09:57:03Z
dc.date.issued2000en_US
dc.description.abstractWe present a novel algorithm to evaluate and render Loop subdivision surfaces. The algorithm exploits the fact that Loop subdivision surfaces are piecewise polynomial and uses the forward difference technique for efficiently computing uniform samples on the limit surface. The main advantage of our algorithm is that it only requires a small and constant amount of memory that does not depend on the subdivision depth. The simple structure of the algorithm enables a scalable degree of hardware implementation. By low-level parallelization of the computations, we can reduce the critical computation costs to a theoretical minimum of about one float[3]- operation per triangle.en_US
dc.description.seriesinformationSIGGRAPH/Eurographics Workshop on Graphics Hardwareen_US
dc.identifier.isbn1-58113-257-3en_US
dc.identifier.issn1727-3471en_US
dc.identifier.urihttps://doi.org/10.2312/EGGH/EGGH00/041-050en_US
dc.publisherThe Eurographics Associationen_US
dc.subjectI.3.1 [Computer Graphics]en_US
dc.subjectHardware Architecture Graphics processorsen_US
dc.subjectI.3.3 [Computer Graphics]en_US
dc.subjectPicture/ Image Generation Display algorithmsen_US
dc.titleTowards Hardware Implementation Of Loop Subdivisionen_US
Files