Dependency Graph Scheduling in a Volumetric Ray Tracing Architecture
dc.contributor.author | Frank, S. | en_US |
dc.contributor.author | Kaufman, A. | en_US |
dc.contributor.editor | Thomas Ertl and Wolfgang Heidrich and Michael Doggett | en_US |
dc.date.accessioned | 2013-10-28T10:00:22Z | |
dc.date.available | 2013-10-28T10:00:22Z | |
dc.date.issued | 2002 | en_US |
dc.description.abstract | We propose a volumetric ray tracing PCI board which uses FPGA components and on chip memory. In a multiboard system a super volume (i.e., one that is larger than on-board memory) can be either distributed or shared. In a single board system it must be fetched from main memory as needed. In any case the volume is sub-divided into cubic cells and process scheduling has a major impact on the rendering time. There is not generally a scheduling order which would allow each sub-volume to be read from memory only once. We introduce instead a new, compact representation of the cell ray-spawning dependencies of all rays, called Cell Tree. We use this Cell Tree to determine a good processing schedule for the next frame based on the ray dependencies from the previous frame. Experimental results show an average miss reduction of 30%. The main contribution of this paper is the generation of a Cell Tree for ray tracing which collects coherent bundles of rays with very little overhead. This is used to decrease overall memory access in sequences where there is good inter-frame coherence. | en_US |
dc.description.seriesinformation | SIGGRAPH/Eurographics Workshop on Graphics Hardware | en_US |
dc.identifier.isbn | 1-58113-580-1 | en_US |
dc.identifier.issn | 1727-3471 | en_US |
dc.identifier.uri | https://doi.org/10.2312/EGGH/EGGH02/127-135 | en_US |
dc.publisher | The Eurographics Association | en_US |
dc.subject | Inter | en_US |
dc.subject | frame coherence | en_US |
dc.subject | Load Balancing | en_US |
dc.subject | Super volume | en_US |
dc.subject | Volumetric Ray Tracing | en_US |
dc.title | Dependency Graph Scheduling in a Volumetric Ray Tracing Architecture | en_US |