Polygon Rendering on a Stream Architecture

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dc.contributor.authorOwens, John D.en_US
dc.contributor.authorDally, William J.en_US
dc.contributor.authorKapasi, Ujval J.en_US
dc.contributor.authorRixner, Scotten_US
dc.contributor.authorMattson, Peteren_US
dc.contributor.authorMowery, Benen_US
dc.contributor.editorI. Buck and G. Humphreys and P. Hanrahanen_US
dc.date.accessioned2013-10-28T09:57:02Z
dc.date.available2013-10-28T09:57:02Z
dc.date.issued2000en_US
dc.description.abstractThe use of a programmable stream architecture in polygon rendering provides a powerful mechanism to address the high performance needs of today s complex scenes as well as the need for flexibility and programmability in the polygon rendering pipeline. We describe how a polygon rendering pipeline maps into data streams and kernels that operate on streams, and how this mapping is used to implement the polygon rendering pipeline on Imagine, a programmable stream processor. We compare our results on a cycleaccurate simulation of Imagine to representative hardware and software renderers.en_US
dc.description.seriesinformationSIGGRAPH/Eurographics Workshop on Graphics Hardwareen_US
dc.identifier.isbn1-58113-257-3en_US
dc.identifier.issn1727-3471en_US
dc.identifier.urihttps://doi.org/10.2312/EGGH/EGGH00/023-032en_US
dc.publisherThe Eurographics Associationen_US
dc.subjectI.3.1 [Computer Graphics]en_US
dc.subjectHardware Architecture Graphics Processors C.1.2 [Processor Architectures]en_US
dc.subjectMultiple Data Stream Architectures Singleen_US
dc.subjectinstructionstreamen_US
dc.subjectmultipleen_US
dc.subjectdataen_US
dc.subjectstream processors (SIMD)en_US
dc.titlePolygon Rendering on a Stream Architectureen_US
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EGGH00: SIGGRAPH/Eurographics Workshop on Graphics Hardware 2000