A Programmable Graphics Processor based on Partial Stream Rewriting

dc.contributor.authorMiddendorf, Larsen_US
dc.contributor.authorHaubelt, Christianen_US
dc.contributor.editorB. Levy, X. Tong, and K. Yinen_US
dc.date.accessioned2015-02-28T16:12:54Z
dc.date.available2015-02-28T16:12:54Z
dc.date.issued2013en_US
dc.description.abstractCurrent graphics processing units (GPU) typically offer only a limited number of programmable pipeline stages, whose usage, data flow and topology are mostly fixed. Although a more flexible, custom rendering pipeline can be emulated using the compute functionality of existing GPUs, this approach requires to manage work queues, synchronization, and scheduling in software. In this paper, we present a hardware architecture for a novel, programmable rendering pipeline, which is based on a circulating stream of data and control tokens that are iteratively modified via pattern matching. Our architecture provides light-weight mechanisms for dynamic thread creation, lock-free synchronization, and scheduling to support recursion, dynamic shader linkage and custom primitive types. A hardware prototype, running complex examples, demonstrates the improved reconfigurability also the scalability of our graphics architecture.en_US
dc.description.seriesinformationComputer Graphics Forumen_US
dc.identifier.doi10.1111/cgf.12240en_US
dc.identifier.issn1467-8659en_US
dc.identifier.urihttps://doi.org/10.1111/cgf.12240en_US
dc.publisherThe Eurographics Association and Blackwell Publishing Ltd.en_US
dc.subjectComputer Graphics [I.3.3]en_US
dc.subjectThree Dimensional Graphics and Realismen_US
dc.subjectDisplay Algorithmsen_US
dc.titleA Programmable Graphics Processor based on Partial Stream Rewritingen_US
Files
Collections