ALITE - AN ENGINEERING TOOL FOR AUTOMATIC CHIP DESIGN

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dc.contributor.authorAnson, R. C.en_US
dc.contributor.authorTweedly, A. G.en_US
dc.contributor.editorD. S. Greenaway and E. A. Warmanen_US
dc.date.accessioned2015-09-29T08:28:45Z
dc.date.available2015-09-29T08:28:45Z
dc.date.issued1982en_US
dc.description.abstractTo meet the variety of layout challenges raised by developing VLSI technology, a new Autolayout system has been developed. This flexible tool provides automated or interactive layout of both 'mass-production' and custom logic IC's for a variety of MOS technologies. The layout process accommodates 2 or 3 routing layers, signals of different widths and produces power and ground connections entirely on a single layer. Additionally the system allows its algorithms to be controlled and directed so that it can be highly tuned to a particular application. The system is integrated with other Integrated Circuit Design aids such as GAELIC, TARTAN and CHECK.en_US
dc.description.seriesinformationEurographics Conference Proceedingsen_US
dc.identifier.doi10.2312/eg.19821023en_US
dc.identifier.issn1017-4656en_US
dc.identifier.urihttps://doi.org/10.2312/eg.19821023en_US
dc.publisherThe Eurographics Associationen_US
dc.titleALITE - AN ENGINEERING TOOL FOR AUTOMATIC CHIP DESIGNen_US
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EG1982 Proceedings (Technical Papers)