Single-Pass Full-Screen Hardware Accelerated Antialiasing

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dc.contributor.authorLee, Jin-Aeonen_US
dc.contributor.authorKim, Lee-Supen_US
dc.contributor.editorI. Buck and G. Humphreys and P. Hanrahanen_US
dc.date.accessioned2013-10-28T09:57:04Z
dc.date.available2013-10-28T09:57:04Z
dc.date.issued2000en_US
dc.description.abstractThis paper describes a modified A-buffer algorithm and its hardware architecture for single-pass full-screen antialiasing. For storage and management of fragments, a dynamic memory management scheme, which can be efficiently implemented by hardware is introduced. In the fragment resolving stage, a subpixel color-blending scheme that resolves subpixels simultaneously is used to correctly blend transparencies and resolve intersections of polygons in a pixel. A rasterization processor architecture, which can process multiple pixels simultaneously, is also presented.en_US
dc.description.seriesinformationSIGGRAPH/Eurographics Workshop on Graphics Hardwareen_US
dc.identifier.isbn1-58113-257-3en_US
dc.identifier.issn1727-3471en_US
dc.identifier.urihttps://doi.org/10.2312/EGGH/EGGH00/067-076en_US
dc.publisherThe Eurographics Associationen_US
dc.subjectI.3.3 [Computer Graphics]en_US
dc.subjectPicture/Image Generation Antialiasingen_US
dc.subjectI.3.1 [Computer Graphics]en_US
dc.subjectHardware Architecture Graphics Processorsen_US
dc.titleSingle-Pass Full-Screen Hardware Accelerated Antialiasingen_US
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EGGH00: SIGGRAPH/Eurographics Workshop on Graphics Hardware 2000