Compiling to a VLIW Fragment Pipeline
| dc.contributor.author | Mark, William R. | en_US |
| dc.contributor.author | Proudfoot, Kekoa | en_US |
| dc.contributor.editor | Kurt Akeley and Ulrich Neumann | en_US |
| dc.date.accessioned | 2013-10-28T09:58:48Z | |
| dc.date.available | 2013-10-28T09:58:48Z | |
| dc.date.issued | 2001 | en_US |
| dc.description.abstract | The latest generation of graphics hardware supports fully programmable vertex and pixel/fragment operations, but programming this hardware at a low level is difficult and time consuming. To address this problem, we have developed a complete real-time procedural shading system that compiles a high-level shading language to programmable vertex and fragment hardware, as described in a separate publication. In this paper, we describe in detail the algorithms used by this system to generate and optimize fragment code for NVIDIAs register combiner architecture and show that our compiler generates efficient code. The register combiner architecture has some similarities to WIW CPU architectures, so we compare our compilation algorithms to those described in the literature for VLIW CPU architectures. We also discuss some of the lessons we leamed from building and using this compiler that may be useful to the designers of future programmable graphics hardware. | en_US |
| dc.description.seriesinformation | Eurographics/SIGGRAPH Graphics Hardware Workshop 2001 | en_US |
| dc.identifier.isbn | 158113407X | en_US |
| dc.identifier.issn | 1727-3471 | en_US |
| dc.identifier.uri | https://doi.org/10.2312/EGGH/EGGH01/047-055 | en_US |
| dc.publisher | The Eurographics Association | en_US |
| dc.subject | L3.7 [Computer Graphics] | en_US |
| dc.subject | Three Dimensional Graphics and Realism | en_US |
| dc.subject | Color | en_US |
| dc.subject | shading | en_US |
| dc.subject | shadowing | en_US |
| dc.subject | and texture | en_US |
| dc.subject | D.3.4 [Programming Languages] | en_US |
| dc.subject | Processors | en_US |
| dc.subject | Compilers and code generation L3.l [Computer Graphics] | en_US |
| dc.subject | Hardware Architecture | en_US |
| dc.subject | Graphics processors | en_US |
| dc.subject | I.3.6 [Computer Graphics] | en_US |
| dc.subject | Methodology and Techniques | en_US |
| dc.subject | Languages | en_US |
| dc.title | Compiling to a VLIW Fragment Pipeline | en_US |