EGGH94: Eurographics Workshop on Graphics Hardware 1994

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A 33MHz 16. Bit Gradient Calculator for Real-Time Volume Imaging
(The Eurographics Association, 1994) Margala, Martin; Durdle, Nelson G.; Raso, V. James; Hill, Doug L.; W. Strasser
This paper describes a gradient calculator which forms an important part of a shading processor being developed for a high resolution high performance real-time general purpose volume imaging system. The proposed architecture overcomes cunent image resolution and frame-rate limitations through the use of custom high-speed processors. The gradient calculator evaluates three arithmetic operations: a square and add operation, square-root, and three division operations. Input output delay time is 30 os with an accuracy of ±O.78%. The algorithms and implementation in silicon are described in detail.
Display Memory Access Issues and Anti-Aliasing with a Virtual Reality Graphics Controller.
(The Eurographics Association, 1994) Regan, Matthew; Pose, Ronald; W. Strasser
An address recalculation pipeline used in conjunction with image composition enables the profitable technique of prioritized rendering to be employed in virtual reality applications. These techniques however require the use of large amounts of fast static memory. Aliasing is also introduced in the system and must be removed with special anti-aliasing hardware. The demands on the display memory are quite severe and an unusual memory architecture and addressing scheme are employed to meet those demands. This results in the required performance and excellent memory efficiency while requiring relatively few components. The system provides far better performance at a lower cost than high-end conventional graphics computer systems running virtual reality applications.
Experience with a Difference Engine for Graphics
(The Eurographics Association, 1994) Kuijk, A.A.M.; Blake, E.H.; Steffens, E.H.; W. Strasser
"The prototype of a novel raster graphics architecture has now become operational. The display hardware can be regarded as a very fast difference engine that works in two-dimensions. The speed is partly achieved by the use of custom VLSI components for the lowest level primitive operations and this permits the video rate reconstruction of images and other signals com pressed by encoding them on various polynomial bases. A novel feature of the architecture is that it avoids the use of a frame buffer. The paper describes our experience with the new hardware in terms of positive and negative performance aspects. We discuss the architecture and its operating parameters. Another part of the paper evaluates our ex perience of hardware development in an academic set ting. We believe there are significant lessons here for graphics researchers who might want to develop their own systems."
A hardware architecture for video rate smooth shading of Volume data
(The Eurographics Association, 1994) Doggett, Michael C.; Hellestrand, Graham R.; W. Strasser
This paper describes a new architecture for generat ing smoothly shaded two dimensional images of volume data. This architecture fits into an image synthesis pipeline and uses only simple arithmetic operations and a look-up table to generate two dimensional images in real time. The shading algorithm is an extensioll of the grey-level gradient algorithm for shading volume data. The shading technique produces smooth images for vox elized geometrical data and sampled volume data. Im age synthesis from volume data in real time is an impor tant technique in visualization and graphics systems.
IMAGINE - The IMAGe engINE
(The Eurographics Association, 1994) Den, Sjef ten; W. Strasser
The tremendous computing power needed for the inter active processing and generation of visual information is more and more becoming a major technology driver in the consumer market. Illustrative are the bench marks used by MacWorld magazine recently at the in troduction of the new generation of Power PC MACs (a major commercial event) used to compare the process ing power of the Power PC with the Intel Pentium and 486: Almost all of them where DTP image processing benchmarks. The majority of the word processor users (estimated at over 100 million people world wide) will evolve to DTP software in the coming years, following the line of ever improving (color) printers and scan ners at steadily eroding prices. The use of 3D graphics is quietly growing among professional users like Archi tects and Engineers. 3D graphics will explode when accelerators will reach price levels low enough for the game industry and will be one of the main ingredients for future multimedia platforms.
Integration of Live Video and Computer Graphics for Video Effect Generation
(The Eurographics Association, 1994) Osterfeld, Utz; Ackermann, Hans-Josef; W. Strasser
We present the architecture of a system, based on a PC, covering real-time video processing by integration of live video and computer graphics. The video processing and integration are realized by generation and evaluation of an on-line MIPmap video texture. This new application of a known filtering technique for still textures in the field of live video processing permits an easy and high performance integration of video and graphics to speed up the video processing. The video texture is mapped on surfaces defined by graphics primitives. The graphics primitives are processed by a standard graphics pipeline with special hardware support for the rendering part.
Interactive Rendering of Volumetric Data Sets
(The Eurographics Association, 1994) Juskiw, "Scott; Durdle, Nelson G.; W. Strasser
The bela architecture for interactive rendering of regularly structured volumetric data sets is presented. The proposed architecture is scalable and uses custom processors to achieve high-speed shading, projection. and composition of voxel primitives. A general purpose image composition network supports the accumulation of both volumetric and geometric elements into the final rendered scene. Data access contentions between processors are eliminated via the use of an enhanced dual object space and image space partitioning scheme that does not require replication or redistribution of rendered data. The bela architecture is intended for rendering large data sets and meets the performance requirements of a full frame interactive image generation system.
The Multimedia Video Processor (MVP)
(The Eurographics Association, 1994) Short, Graham; W. Strasser
In 1987 engineers from Texas Instruments started work on the specification of a device which would become the next generation in its TMS320 Digital Signal Processor and TMS340 Graphics System Processor families, building on the successes and lessons learnt from each. It was to be targeted at a number of graphics applications.
A Parallel Implementation of Bidirectional Ray Tracing on Transputer-based System
(The Eurographics Association, 1994) Kawai, Toshiyuki; Kami, M.; Teranishi, Tadamasa; Abeki, Jun-ichi; Ohnishi, Hironobu; W. Strasser
This paper describes a parallel processing scheme for bidirectional ray tracing which improves the reality of the image drastically. It is organized from two stages, i.e. light ray tracing and viewing ray tracing. In light ray tracing, pairs of a light source and an element of objects are distributed to each processor dynamically. In viewing ray tracing, we use a screen subdivision al gorithm. Our system consists of 86 transputers. All of the scene data are placed on shared memories, and only the required parts of them can be transferred to the cache memory on each processor by means of DMA on-the-Hy. We also show some experimental results.
A Real Time Rendering System with Normal Vector Shading
(The Eurographics Association, 1994) Jackél, D.; Rüsseler, H.; W. Strasser
This paper presents a graphics workstation for real time display of Phong shaded polygons. The applied shading method is based on normal vector interpolation using a precalculated reflectance map. Nearly 40 million pixels and more than 2 million 3 sided polygons per second can be displayed. After giving an overview of the system, we describe the implementation details of the architecture. The normal vector-based shader unit is the focus of this description. In addition, we present a new method for the reduction of Z-buffer initialization time by means of an additional frame counter. Finally, we summarize the performance data of the rendering system and give an outlook ofour future activities in this field.
A Scalable Architecture for Volume Rendering
(The Eurographics Association, 1994) Knittel, Günter; W. Strasser
We describe the operational principles of a scalable hardware accelerator for volume rendering. The basic philosophy is to provide an atomic unit which already provides sophisticated volume graphics at interactive rendering speed. Realtime speed can then be achieved by operating multiple units in par allel. The basic unit consists of just four VLSI chips and the volume memory and thus meets the requirements of a small size and low costs. Never theless it provides arbitrary perspective projections (e.g., for walk-throughs), Phong shading, a freely moveable light source, depth-cueing and interac tive, non-binary classification (semi-transparent display) at a frame rate of about 2.5Hz for 256 3 data sets.
Sheared Interpolation and Gradient Estimation for Real-Time Volume Rendering
(The Eurographics Association, 1994) Pfister, Hanspeter; Wessels, Frank; Kaufman, Arie; W. Strasser
In this paper we present a technique for the interactive control and display of static and dynamic 3D datasets. We describe novel ways of tri-linear interpolation and gradient estimation for a real-time volume rendering system, using coherency between rays. We show simu lation results that compare the proposed methods to tra ditional algorithms and present them in the cantezt of Cube-B, a special-purpose architecture capable afrender ing 5123 16-bit per vozel datasets at over 20 frames per second.
The Sussex Multimedia Frame Buffer
(The Eurographics Association, 1994) Pearce, Simon F.; Bassett, Mike C.; Dunnett, Graham J.; Lister, Paul F.; W. Strasser
This paper describes work at the University of Sussex in the field of multimedia video and high resolution display control. This paper is the result of research carried out for the SMILE (SPARC Macrocell and Interface Library Elements) project, one of the coordinated set o f projects within Esprit III. The overall objective ofSMILE is to develop, within the Open Microprocessor systems Initiative (OMI) framework, a family o f SP ARC based library cells, both 32-bit processor-core and application-oriented, to provide the basis for a next generation family o f microprocessors/controliers that give the European systems industry a collective edge. The University of Sussex is required to design a system that provides 2-D graphics functions to support full motion video, image transformation and high resolution display control. In this paper we describe the approach taken in employing classic memory interleaving techniques together with an innovative memory access coordination approach and dedicated video hardware to provide a high bandwidth frame store, optimised for live video support.
VIRIM: A Massively Parallel Processor for Real-Time Volume Visualization in Medicine
(The Eurographics Association, 1994) Günther, T.; Poliwoda, C.; Reinhart, C.; Hesser, J.; Männer, R.; Meinzer, H.-P.; Baur, H.-I.; Strasser, W.
Architecture and applications of a massively parallel processor are described. Volumes of 256x256x128 voxels can be visualized at a frame rate of 10 Hz using volume oriented visualization algorithms. A prototype of the scalable and modular system is currently set up. 3D rotation around an arbilrary rotation axis, perspective, zooming, and arbilrary gray value mapping are provided in real-time. Multi user access over high-speed networks is possible. A volume oriented visualization algorithm is used that is tailored to the requirements in medicine [5]. With this algorithm, small structures of a size down to the pixel resolution, and structures without defined surfaces can be visualized as well as semi-trans parent objects. One application of the system is therapy planning in heart surgery.

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